| Topic | Reading | Recommended Exercises |
|---|---|---|
| Arithmetic Circuits | DDCA 5.1-5.2.5 | Exercises 5.1, 5.3, 5.5 (difficult!), 5.8 |
| Other Building Blocks | DDCA 5.4-5.5.7 | Exercises 5.13 (no HDL work), 5.14, 5.15, 5.17, 5.37-5.39, 5.45, 5.47 |
The reading this week covers two final building blocks: arithmetic circuits and memory. It's a chance for us to look at more complicated circuits, so we can test our understanding of latency (and timing analysis).
In lab, you'll be putting these items together. You'll use arithmetic circuits in an ALU and connect it to a register file. At that point, you'll have an entire single-cycle processor, and we'll be discussing that processor in class after reading week.
Section 5.2 does a pretty good job building from a single bit half-adder up to a multi-bit adder. The material doesn't get difficult until you look at carry-lookahead and prefix adders: adders that are optimized to reduce latency. As you read the carry-lookahead and prefix material, keep in mind that the majority of the latency in the adder comes from the "carry chain." (Recall: you can't add a column of numbers until you know whether the previous column is going to produce a "carry.") Thus, our adders have two major functions: first, to calculate whether or not any particular position will generate a "carry" to the next column and, second, to calculate the actual result at each position.
Figure 5.7 is a critical figure: it demonstrates how a prefix adder combines the input bits to quickly calculate the sum. Most of the figure is concerned with the first major function -- the calculation of the carry chain. The top row of boxes calculates the propagate (P) and generate (G) results for each position (individually). The black boxes in the middle, which form a tree, combine the P and G results so that when the carry bit finally arrives, the final computation can proceed quickly. The row of boxes at the bottom actually calculate the sum (given the input bits and the final generate bit). We'll review this figure in class, but you should do an example addition, using the figure as a guide, to get a sense of how a prefix adder works before class.
There are sections on multiplication and division and on floating point numbers if you're interested, but you don't need to read them for this course.
The final two sections introduce counters, shift registers, and various forms of memory. Counters and shift registers are modifications of basic registers; skip the section about scan chains and just ask yourself, "What purpose do these special registers serve?" The section on memory introduces a number of key terms that you should be able to define: register file, RAM (random access memory), and ROM (read only memory).
When reading the memory section, don't worry about the details of implementation or of size. Instead, ask yourself, "Why do we need this particular variant of memory?" The goal is to understand what each particular variant of memory does well and why that is important to us. This understanding will help in class when we relate these memory structures to the programmer's memory model. (You may already have seen the memory model from 209. One view of memory is of the address space: the stack, heap, code, etc. Another view is of the register space within the processor.)